FPGA Verification Engineer

Piper Companies is seeking a FPGA Verification Engineer to support an industry leader in technology. This position will be on-site in San Jose, CA. The FPGA Verification Engineer will be focused on FPGA verification on routers for a variety of customers.

Responsibilities of the FPGA Verification Engineer include:

• Developing and executing comprehensive test plans
• Writing test sequences, analyzing coverage metrics, and identifying and debugging design flaws
• Collaborating closely with FPGA design engineers to guarantee the quality of the final product

Qualifications for the FPGA Verification Engineer include:

• 6-8 years of verification experience in FPGAs / ASIC
• Proficient in SystemVerilog and/or UVM (Universal verification methodology)
• Background in networking computing - -working in digital design environment for FPGA

Compensation for the FPGA Verification Engineer include:

• Salary Range: $130,000-165,000
• Comprehensive Benefits: Cigna Medical, Dental, Vision, 401K, PTO, Sick Leave if required by law, and Holidays

This job opens for applications on 3/21/2025. Applications for this job will be accepted for at least 30 days from the posting date.

Keywords: FPGA, UVM, SystemVerilog, ASIC, verification, routers, network, networking, engineer, RTL, debug, IP, integration, infrastructure, interfaces, PCIe, testcases, systems, scripting, develop

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