Verification Engineer
San Jose, CA
Job Id:
138530
Job Category:
Job Location:
San Jose, CA
Security Clearance:
No Clearance
Business Unit:
Piper Companies
Division:
Piper Enterprise Solutions
Position Owner:
Gianna Migliarese
Piper Companies is seeking a Verification Engineer to work 100% onsite for a large software development company based in San Jose, CA. The Verification Engineer is responsible for ensuring that products and systems meet specified requirements and function correctly through rigorous testing and validation processes.
Responsibilities of the Verification Engineer:
- Develop and execute verification plans to ensure product functionality and performance.
- Create and maintain test environments, including test benches and simulation models.
- Perform detailed analysis of test results and identify root causes of failures.
- Collaborate with design and development teams to resolve issues and improve product quality.
- Document verification processes, test cases, and results for future reference.
Qualifications of the Verification Engineer:
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
- 5+ years of experience in verification and validation of hardware or software systems.
- Proficiency in verification methodologies such as UVM, SystemVerilog, or similar.
- Experience with simulation tools and test automation frameworks.
- Strong analytical and problem-solving skills.
- Excellent communication and teamwork abilities.
- Familiarity with industry standards and best practices in verification.
- Ability to work independently and manage multiple tasks effectively.
Compensation for Verification Engineer:
Hourly rate: $75.0 - $79.0 per hour
Comprehensive Benefits: Medical, Dental, Vision, 401K, PTO, Sick Leave if required by law, and Holidays
Keywords:
Verification Engineer, Validation Engineer, Test Engineer, QA Engineer, Quality Assurance Engineer, Hardware Verification Engineer, Software Verification Engineer, Electrical Engineer, Computer Engineer, Electronics Engineer, UVM, SystemVerilog, VHDL, Verilog, Test Automation, Simulation Tools, Test Benches, Test Environments, Root Cause Analysis, Product Quality, Documentation, Test Cases, Bachelor's degree in Electrical Engineering, Bachelor's degree in Computer Engineering, Bachelor's degree in Electronics Engineering, Master's degree in Electrical Engineering, Master's degree in Computer Engineering, Master's degree in Electronics Engineering, Analytical Skills, Problem-Solving Skills, Communication Skills, Teamwork Abilities, Industry Standards, Best Practices, Independent Work, Multi-Tasking, Agile Methodologies, Debugging Tools, Functional Testing, Performance Testing, Regression Testing, Integration Testing, Test Plans, Test Strategies, Test Scripts, Test Reports, Test Metrics, Test Coverage, Test Management Tools, Test Data Management, Test Execution, Test Validation, Test Verification, Test Analysis, Test Design, Test Development.
This job opens for applications on March 21st, 2025. Applications for this job will be accepted for at least 30 days from the posting date
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