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CoWoS Principle Packaging Engineer

Saratoga, CA

Piper Companies Logo

Job Id:
141061

Job Category:

Job Location:
Saratoga, CA

Security Clearance:
No Clearance

Business Unit:
Piper Companies

Division:
Piper Enterprise Solutions

Position Owner:
Beth Roberts

Piper Companies is looking for a CoWoS Principle Packaging Engineer who will construct and enhance Chip-on-Wafer-on-Substrate packaging technology to support high-performance AI and data center applications onsite in Saratoga, CA. The ideal CoWoS Principle Packaging Engineer will collaborate with cross-functional teams to facilitate smooth integration of advanced multi-die packages.

 

Responsibilities for the CoWoS Principle Packaging Engineer:

  • Lead the advancement of CoWoS packaging technology to enhance chip performance, power, and reliability.
  • Develop and enhance CoWoS packaging processes to ensure superior thermal, mechanical, and electrical performance.
  • Work closely with cross-functional design, test, and manufacturing teams for seamless chip-package integration.
  • Implement strategies to enhance yield and address failure modes across packaging flows.

Qualifications for the CoWoS Principle Packaging Engineer:

  • 15+ years' experience in advanced semiconductor packaging and interconnect processes.
  • Demonstrated expertise in CoWoS / FOCoS, or FOWLP and proficient in EMIB, InFO, and advanced 2.5D/3D integration technologies.
  • Deep knowledge of thermal management, reliability testing, and signal/power integrity challenges.
  • Proven experience working with TSMC and leading OSATs.
  • Must be eligible to work in the United States and obtain and maintain an Active U.S. Government Secret Clearance.
  • Bachelor’s or Master's degree in Electrical Engineering, Materials Science, Mechanical Engineering, or related field.

Compensation/Benefits for CoWoS Principle Packaging Engineer:

  • Salary/rate range: $210,000 - $290,000 annually
  • Comprehensive Benefits: Medical, Dental, Vision, 401K, PTO, Sick Leave if required by law, and Holidays.

This job opens for applications on 5/2/2025. Applications for this job will be accepted for at least 30 days from the posting date.

 

Keywords: Semiconductor Packaging, CoWoS, FOCoS, FOWLP, EMIB, InFO, 2.5D/3D Integration, AI Infrastructure, Data Center Applications, Thermal Management, Reliability Testing, Signal Integrity, Power Integrity, TSMC, OSAT


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