Advanced Packaging Integration Engineer

Piper Companies is looking for an Advanced Packaging Integration Engineer to join a cutting-edge startup onsite in Saratoga, CA. The ideal Advanced Packaging Integration Engineer will drive the development and integration of next-generation packaging solutions for high-performance semiconductor products.

Responsibilities for the Advanced Packaging Integration Engineer:

• Lead advanced packaging initiatives, including 2.5D CoWoS and chiplet-based integration, from concept through production.
• Collaborate with global teams, including TSMC in Taiwan, to align packaging strategies with system-level requirements.
• Own the development of test vehicles and qualification plans for multi-die and high-density packaging technologies.
• Influence system architecture by integrating packaging solutions that optimize thermal, mechanical, and electrical performance.

Qualifications for the Advanced Packaging Integration Engineer:

• 10+ years of experience in advanced IC packaging, with a strong background in system-level integration.
• Must be eligible to work in the United States and obtain and maintain an Active U.S. Government Secret Clearance.
• Knowledge in CoWoS technology and familiarity with 2.5D/3D stacking and chiplet-based architectures.
• Proven ability to lead cross-functional teams and manage vendor relationships with foundries and OSATs.
• Strong understanding of substrate/interposer technologies, fine-pitch interconnects, and multi-die co-design.
• Experience with DFM, DFY, DFR, and reliability testing methodologies.
• Bachelor’s degree in Mechanical, Electrical Engineering or Materials science background are a plus.

Compensation/Benefits for the Advanced Packaging Integration Engineer:

• Salary Range: $200,000 – $275,000 annually
• Comprehensive Benefits: Medical, Dental, Vision, 401K, PTO, Sick Leave (as required by law), and Paid Holidays

This job opens for applications on June 30, 2025. Applications for this job will be accepted for at least 30 days from the posting date.

Keywords: Advanced Packaging, CoWoS, 2.5D Integration, 3D Stacking, Chiplet, Multi-Die Packaging, TSMC, OSAT, Substrate Technology, Interposer, System Integration, Semiconductor Packaging, High-Density Interconnect, DFM, DFY, DFR, Reliability Testing, Mechanical Engineering, Electrical Engineering, IC Packaging, Packaging Engineer, 3D, integrator, package development

#LI-BR1

#LI-ONSITE

#PANDO