Senior Engineer, Power Integrity

Piper Companies is seeking a Senior Engineer, Power Integrity to join an industry‑leading organization in the advanced semiconductor and AI hardware space for a permanent opportunity. The Senior Engineer, Power Integrity will support the design, modeling, and analysis of complex power delivery networks for next‑generation chip and wafer‑scale systems.

Responsibilities of the Senior Engineer, Power Integrity include:

· Design, analyze, and validate power delivery networks (PDNs) for highly integrated chip and wafer‑level systems.

· Develop PDNs for PCBs and organic substrates, including power planes, stackups, and routing structures.

· Create and simulate models covering pads, BGAs, routing layers, via structures, and embedded capacitance.

· Perform DC and AC power load analysis and generate end-to-end impedance and current density reports.

· Provide data-driven recommendations on ballmaps, routing rules, decoupling strategies, and PDN tradeoffs.

Qualifications for the Senior Engineer, Power Integrity include:

· Proven experience with vertical power delivery architectures and PDN design.

· Hands-on proficiency with power integrity modeling tools such as ADS, Matlab, Q3D, SiWave, or comparable platforms.

· Strong understanding of analog and digital circuit design fundamentals.

· At least 10 years of relevant industry experience, with a Master's degree or higher in Electrical Engineering.

· Demonstrated ability to analyze complex PDN performance and translate findings into actionable design guidance.

Compensation for the Senior Engineer, Power Integrity:

Salary Range: $210,000-$265,000/year (USD)

Comprehensive Benefits: Medical, Dental, Vision, sick leave if required by law, and 401K

This job opens for applications on 2/8/26. Applications for this job will be accepted for at least 30 days from the posting date.

Keywords: power integrity, PDN design, chip design, wafer-scale systems, PCB design, organic substrate, modeling, simulation, ADS, Matlab, Q3D, SiWave, power delivery network, current density, impedance analysis, decoupling strategy, analog design, digital design, circuit design, high‑performance computing, semiconductor engineering, signal integrity, thermal analysis, packaging, BGA, stackup design.

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