Senior Systems Hardware Engineer

Piper Companies is seeking a Senior Systems Hardware Engineer to support an innovative organization in the advanced hardware and AI infrastructure space for an onsite position (Monday-Friday) near San Jose, CA. The Senior Systems Hardware Engineer will play a key role in shaping the hardware lifecycle end-to-end, working closely with ASIC, software, and system teams to solve complex technical challenges at scale. 

Responsibilities of the Senior Systems Hardware Engineer include: 

· Own the end-to-end hardware development lifecycle, from system architecture and specification through validation and production release 

· Architect and design high-performance, power-efficient hardware solutions for next-generation AI data center infrastructure 

· Lead schematic design and board development using Cadence (Concept/Allegro) and related toolchains 

· Partner closely with ASIC, firmware, software, and signal integrity teams to ensure seamless cross-functional integration 

Qualifications for the Senior Systems Hardware Engineer include: 

· Bachelor’s degree in Electrical Engineering, Computer Engineering, or related discipline required; Master’s degree preferred   

· 10+ years of experience in system-level hardware design, with a strong focus on server, networking, or data center technologies 

· Deep expertise in high-speed digital design, including hands-on experience with 100G+ Ethernet and multi-lane SerDes (56G/112G/224G) 

· Proven experience designing complex boards using Cadence Concept/Allegro or similar tools 

· Proficiency in at least one programming language such as Python, Java, or similar 

· Solid knowledge of system architectures, including x86 platforms and key control interfaces (PCIe, MDIO, SPI, I2C) 

Compensation for the Senior Systems Hardware Engineer: 

· Base Salary: $210,000-$260,000 (USD) 

· Comprehensive Benefits: Medical, Dental, Vision, Sick Leave if Required by Law, 401K, and Paid Holidays 

Keywords: Hardware Development, Systems Hardware Engineer, Electrical Engineering, High-Speed Design, SerDes, Ethernet, ASIC, Cadence, Allegro, PCB Design, Signal Integrity, Data Center Hardware, AI Infrastructure, PCIe, MDIO, SPI, Python 

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This job opens for applications on 6/5/26. Applications for this job will be accepted for at least 30 days from the posting date.